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Corner Effect in Multiplier SOI-Fin FETs

Received: 8 December 2013     Published: 20 February 2014
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Abstract

SOI-Multi-FinFET was analyzed by a three-dimensional numerical device simulator and its electrical characteristics and potential distribution in the oxide and the silicon in the section perpendicular to the flow of the current were compared for single-fin, three-fin and five-fin FET to investigate the influence of fins number on corner effect in Dual-gate SOI Multi-FinFET, and we provide a comparison with a Tri-gate SOI Multi-FinFET structure.

Published in Science Journal of Circuits, Systems and Signal Processing (Volume 3, Issue 1)
DOI 10.11648/j.cssp.20140301.11
Page(s) 1-4
Creative Commons

This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.

Copyright

Copyright © The Author(s), 2014. Published by Science Publishing Group

Keywords

SOI, Fin FET, Corner Effect, Dual-Gate, Tri-Gate, Multi-Fin FET

References
[1] V. Subramanian, A. Mercha, B. Parvais, M. Dehan, G. Groeseneken, W. Sansen and S.Decoutere "Identifying the Bottlenecks to the RF Performance of FinFETs," Proceedings of the 23rd Annual International Conference on VLSI Design, Bangalore, 3-7 January 2010, pp. 111-116.
[2] P. Mishra and N.K. Jha, "Low-power FinFET circuit synthesis using surface orientation optimization," in Proc. Design Automation and Test in Europe, Mar. 2010, pp. 311–314.
[3] P. Mishra, A. Muttreja, and N.K. Jha, "Low-power FinFET circuit synthesis using multiple supply and threshold voltages," ACM J. Emerg. Tech. Comput. Syst., 5 (2):1–23, Jul. 2009.
[4] M. Poljak, V. Jovanovi´c, and T. Suligoj, "Suppression of corner effects in wide-channel triple-gate bulk FinFETs," Microelectronic Engineering, 87, 192–199 (2010).
[5] T. Baldaufa, A. Weib, T. Herrmannb, S. Flachowskyb, R. Illgenb, J. Höntschelb, M. Horstmannb, W. Klixa, and R. Stenzela "Suppression of the Corner Effects in a 22 nm Hybrid Tri-Gate/Planar Process" in IEEE-2011, pp. 1-4.
[6] Jean-Pierre Colinge, "Multiple-gate SOI MOSFETs" Solid-State Electronics 48, 897-905 (2004).
[7] P. Feng and P. K. Ghosh, "Comparison of Silicon-on-Insulator and Body-on-Insulator FinFET Based Digital Circuits with Consideration on Self-Heating Effects," IEEE International Semiconductor Device Research Symposium, College Park, Maryland, 7-9 December 2010, pp. 1-2.
[8] ATLAS, Silvaco International, Santa Clara, CA, 2001.
Cite This Article
  • APA Style

    A.N. Moulai Khatir, A. Guen-Bouazza, B. Bouazza. (2014). Corner Effect in Multiplier SOI-Fin FETs. Science Journal of Circuits, Systems and Signal Processing, 3(1), 1-4. https://doi.org/10.11648/j.cssp.20140301.11

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    ACS Style

    A.N. Moulai Khatir; A. Guen-Bouazza; B. Bouazza. Corner Effect in Multiplier SOI-Fin FETs. Sci. J. Circuits Syst. Signal Process. 2014, 3(1), 1-4. doi: 10.11648/j.cssp.20140301.11

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    AMA Style

    A.N. Moulai Khatir, A. Guen-Bouazza, B. Bouazza. Corner Effect in Multiplier SOI-Fin FETs. Sci J Circuits Syst Signal Process. 2014;3(1):1-4. doi: 10.11648/j.cssp.20140301.11

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  • @article{10.11648/j.cssp.20140301.11,
      author = {A.N. Moulai Khatir and A. Guen-Bouazza and B. Bouazza},
      title = {Corner Effect in Multiplier SOI-Fin FETs},
      journal = {Science Journal of Circuits, Systems and Signal Processing},
      volume = {3},
      number = {1},
      pages = {1-4},
      doi = {10.11648/j.cssp.20140301.11},
      url = {https://doi.org/10.11648/j.cssp.20140301.11},
      eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.cssp.20140301.11},
      abstract = {SOI-Multi-FinFET was analyzed by a three-dimensional numerical device simulator and its electrical characteristics and potential distribution in the oxide and the silicon in the section perpendicular to the flow of the current were compared for single-fin, three-fin and five-fin FET to investigate the influence of fins number on corner effect in Dual-gate SOI Multi-FinFET, and we provide a comparison with a Tri-gate SOI Multi-FinFET structure.},
     year = {2014}
    }
    

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    T1  - Corner Effect in Multiplier SOI-Fin FETs
    AU  - A.N. Moulai Khatir
    AU  - A. Guen-Bouazza
    AU  - B. Bouazza
    Y1  - 2014/02/20
    PY  - 2014
    N1  - https://doi.org/10.11648/j.cssp.20140301.11
    DO  - 10.11648/j.cssp.20140301.11
    T2  - Science Journal of Circuits, Systems and Signal Processing
    JF  - Science Journal of Circuits, Systems and Signal Processing
    JO  - Science Journal of Circuits, Systems and Signal Processing
    SP  - 1
    EP  - 4
    PB  - Science Publishing Group
    SN  - 2326-9073
    UR  - https://doi.org/10.11648/j.cssp.20140301.11
    AB  - SOI-Multi-FinFET was analyzed by a three-dimensional numerical device simulator and its electrical characteristics and potential distribution in the oxide and the silicon in the section perpendicular to the flow of the current were compared for single-fin, three-fin and five-fin FET to investigate the influence of fins number on corner effect in Dual-gate SOI Multi-FinFET, and we provide a comparison with a Tri-gate SOI Multi-FinFET structure.
    VL  - 3
    IS  - 1
    ER  - 

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Author Information
  • Research Unit of Materials and Renewable Energies URMER, Abou Bekr Belkaid University, Tlemcen 13000.BP 119, Algeria

  • Research Unit of Materials and Renewable Energies URMER, Abou Bekr Belkaid University, Tlemcen 13000.BP 119, Algeria

  • Research Unit of Materials and Renewable Energies URMER, Abou Bekr Belkaid University, Tlemcen 13000.BP 119, Algeria

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